In integrated circuit (IC) devices, resistive random access memory (RRAM) is an emerging technology for next generation non-volatile memory devices. RRAM is a memory structure including an array of RRAM cells each of which stores a bit of data using resistance values, rather than electronic charge. Particularly, each RRAM cell includes a resistive material layer, the resistance of which can be adjusted to represent logic “0” or logic “1.” RRAM devices operate under the principle that a dielectric, which is normally insulating, can be made to conduct through a filament or conduction path formed after the application of a sufficiently high voltage. The forming of a filament or conduction path is the forming operation or forming process of the RRAM. The sufficiently high voltage is the ‘form’ voltage. The conduction path formation can arise from different mechanisms, including defect, metal migration, and other mechanisms. Various different dielectric materials may be used in RRAM devices. Once the filament or conduction path is formed, it may be “reset”, i.e. broken, resulting in high resistance or “set”, i.e. re-formed, resulting in lower resistance, by an appropriately applied voltage. There are various architectures to configure an array of RRAM cells. For example, a cross-point architecture includes a RRAM in each cell configured between a crossed word line and bit line. Recently, a transistor type architecture that pairs a RRAM with a transistor (1T1R) in each cell has been proposed that can improve random access time. However, initial proposals result in an inefficient device with significant leakage current. Thus, improvements in 1T1R RRAM cell and method of manufacturing continue to be sought.